One main class of integrated MOS circuits are the so-called two-phase circuits, i.e. circuits for the operation of which non-overlapping clock signals are required, cf. the book by D. Becker and H. Mader "Hochintegrierte MOS-Schaltungen", Stuttgart, 1972, pp. 60 to 71. As a rule, such circuits exclusively consist of MOSFETs, an abbreviation standing for "metal oxide semiconductor field-effect transistor" which, however, are at present no longer restricted exclusively to field effect transistors having a layer of oxide for serving as the insulating layer lying below the gate terminal. Other insulating layer materials have become known.
From the aforementioned book it is also known to arrange the oscillator for generating the two clock signals on the same semiconductor chip as the MOS-circuit to be driven by the two clock signals. The clock signal generator consists of a suitable oscillator circuit generating a square wave signal with a pulse duty factor of less than 0.5, and of an interconnecting and power output stage forming the two non-overlapping clock signals from this square wave signal.
Quite depending on the size and complexity of the integrated MOS circuit which, according to the present state of art, permits realization of a maximum chip surface area of about 20 mm.sup.2, with up to ten thousand MOS-FET's being arranged on this surface area, a considerable power loss is converted in the power output stage of the clock signal generator.